1. Field of the Invention
The invention relates to the field of integrated circuit manufacturing, and more particularly, to an integrated circuit having a diffusion trapping layer and a method of manufacturing the same.
2. Description of the Prior Art
In the process of manufacturing an integrated circuit, it is very likely for metal ions such as Cu, Fe, or Na ions from structures such as through-Si-via (TSV), interconnection structure, or metal electrode of semiconductor device, to diffuse into transistor structures and interconnection structures, causing performance degradation or even fault of the integrated circuit.
The metal ions may be trapped by means of directly implanting ions into the integrated circuit structure. However, the implanted ions may enter regions other than the target regions. Particularly, the dielectric layers and the through-Si-vias in the integrated circuit will probably be damaged.